View XC6109N5XXNX_1337599.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

CMOS Highly Accurate : +2% Low Power Consumption : 0.9A (TYP.) (VDF=1.9V, VIN = 2.0V) Built-In Delay Circuit, Delay Pin Available
APPLICATIONS
Microprocessor reset circuitry Charge voltage monitors Memory battery back-up switch circuits Power failure detection circuits
GENERAL DESCRIPTION
The XC6109 series is highly precise, low power consumption voltage detector, manufactured using CMOS and laser trimming technologies. With the built-in delay circuit, connecting the delay capacitance pin to the capacitor enables the IC to provide an arbitrary release delay time. Using an ultra small package (SSOT-24), the series is suited for high density mounting. Both CMOS and N-channel open drain output configurations are available.
FEATURES
Highly Accurate : +2%
(Setting Voltage Accuracy>1.5V)
: +30mV
(Setting Voltage Accuracy<1.5V)
Low Power Consumption Detect Voltage Range Operating Voltage Range
: 0.9 A (TYP., VDF=1.9V, VIN= 2.0V) : 0.8V ~ 5.0V in 100mV increments : 0.7V ~ 6.0V : 100ppm/ OC (TYP.)
Detect Voltage Temperature Characteristics Output Configuration : CMOS or N-channel open drain Operating Temperature Range : -40 OC ~ +85 OC Ultra Small Package : SSOT-24
TYPICAL APPLICATION CIRCUIT
TYPICAL PERFORMANCE CHARACTERISTICS
Release Delay Time vs. Delay Capacitance
XC6109xxxA N
VIN(MIN.)=0.7V,VIN(MAX.)=6.0V
VIN VIN Cd VSS Cd VOUT
R=100k
(No resistor needed for CMOS output products)
Release Delay Time: TDR (ms)
10000 1000 100 10 1 0.1 0.0001
Tr=5s, Ta=25
0.001 0.01 0.1 Delay Capacitance: Cd (F)
1
XC6109 ETR0206_004
1/13
XC6109 Series
PIN CONFIGURATION
PIN ASSIGNMENT
PIN NUMBER 1 2 3 4 PIN NAME VIN VSS Cd VOUT FUNCTION Input Ground Delay Capacitance Output (Detect "L")
PRODUCT CLASSIFICATION
Ordering Information
XC6109 DESIGNATOR DESCRIPTION Output Configuration Detect Voltage Output Delay & Hysteresis Package Device Orientation SYMBOL C N 08 ~ 50 A N R L : CMOS output : N-ch open drain output : e.g. 181.8V : Built-in delay pin & hysteresis 5% (TYP.) : SSOT-24 : Embossed tape, standard feed : Embossed tape, reverse feed DESCRIPTION
2/13
XC6109
Series
PACKAGING INFORMATION
SSOT-24
MARKING RULE
SSOT-24
4 3
Represents output configuration and integer number of detect voltage CMOS output (XC6109C Series) N-ch Open Drain output (XC6109N Series) MARK VOLTAGE (V) A 0.x B 1.x C 2.x D 3.x E 4.x F 5.x PRODUCT SERIES XC6109C0xxNx XC6109C1xxNx XC6109C2xxNx XC6109C3xxNx XC6109C4xxNx XC6109C5xxNx MARK VOLTAGE (V) K 0.x L 1.x M 2.x N 3.x P 4.x R 5.x PRODUCT SERIES XC6109N0xxNx XC6109N1xxNx XC6109N2xxNx XC6109N3xxNx XC6109N4xxNx XC6109N5XXNX
1
2
SSOT-24 (TOP VIEW)
Represents decimal number of detect voltage MARK N P R S T U V X Y Z VOLTAGE (V) x.0 x.1 x.2 x.3 x.4 x.5 x.6 x.7 x.8 x.9 PRODUCT SERIES XC6109xx0xNx XC6109xx1xNx XC6109xx2xNx XC6109xx3xNx XC6109xx4xNx XC6109xx5xNx XC6109xx6xNx XC6109xx7xNx XC6109xx8xNx XC6109xx9xNx
Represents production lot number 0 to 9, A to Z or inverted characters of 0 to 9, A to Z repeated/ (G, I, J, O, Q, W excepted)
3/13
XC6109 Series
BLOCK DIAGRAMS
(1) XC6109C (CMOS Output)
(2) XC6109N (N-ch Open Drain Output)
4/13
XC6109
Series
ABSOLUTE MAXIMUM RATINGS
PARAMETER Input Voltage Output Current Output Voltage XC6109C (*1) XC6109N (*2) SYMBOL VIN IOUT VOUT VCD ICD Pd Ta Tstg RATINGS VSS - 0.3 ~ 7.0 10 VSS - 0.3 ~ VIN + 0.3 VSS - 0.3 ~ 7.0 VSS-0.3 ~ VIN + 0.3 5.0 150 - 40 ~ + 85 - 40 ~ + 125
Ta = 25OC UNITS V mA V V mA mW
O O
Delay Pin Voltage Delay Pin Current Power Dissipation SSOT-24 Operating Temperature Range Storage Temperature Range
NOTE: *1: CMOS output *2: N-ch open drain output
C C
ELECTRICAL CHARACTERISTICS
Ta = 25OC PARAMETER Operating Voltage Detect Voltage Hysteresis Range 1 Supply Current 1 SYMBOL VIN VDF VHYS1 ISS1 CONDITIONS VDF(T)=0.8~5.0V (*1) VDF(T)=0.8~5.0V VIN=1.0~6.0V VDF(T)=0.8~1.9V VIN=VDF x 0.9 VDF(T)=2.0~3.9V VDF(T)=4.0~5.0V VDF(T)=0.8~1.9V VIN=VDF x 1.1 VDF(T)=2.0~3.9V VDF(T)=4.0~5.0V VIN=VDFx0.9 VDS=0.5V (N-ch) VIN=VDFx1.1 VDS=0.5V (P-ch) -40 OCCIRCUIT
1 1 2
Supply Current 2
ISS2
A mA mA ppm/
O
2
IOUT1 Output Current IOUT2 (*2) VDF TaVDF Rdelay ICD VTCD VUNS TDF0 TDR0
3 3 1 4 4 5 6 7 7
Temperature Characteristics Delay Resistance (*3) Delay Pin Sink Current Delay Capacitance Pin Threshold Voltage Unspecified Operating Voltage (*4) Detect Delay Time (*5) Release Delay Time (*6)
C
M A V V s s
NOTE: *1: VDF(T): Setting Detect Voltage *2: This numerical value is applied only to the XC6109C series (CMOS output). *3: Calculated from the voltage value and the current value of both ends of the resistor. *4: The maximum voltage of the VOUT in the range of the VIN 0 to 0.7V. This numerical value is applied only to the XC6109C series (CMOS output). *5: Time which ranges from the state of VIN =VDF to the VOUT reaching 0.6V when the VIN falls without connecting to the Cd pin. *6: Time which ranges from the state of VIN= VDF +VHYS to the VOUT reaching 5.4V when the VIN rises without connecting to the Cd pin.
5/13
XC6109 Series
VOLTAGE CHART
SYMBOL SETTING OUTPUT VOLTAGE (V) VDF(T) 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0 E-1 DETECT VOLTAGE (*1) (V) VDF TYP. 0.800 0.900 1.000 1.100 1.200 1.300 1.400 1.500 1.600 1.700 1.800 1.900 2.000 2.100 2.200 2.300 2.400 2.500 2.600 2.700 2.800 2.900 3.000 3.100 3.200 3.300 3.400 3.500 3.600 3.700 3.800 3.900 4.000 4.100 4.200 4.300 4.400 4.500 4.600 4.700 4.800 4.900 5.000 E-2 OUTPUT CURRENT (mA) IOUT1 TYP. 0.36 E-3 OUTPUT CURRENT (*2) (mA) IOUT2 TYP. -0.20
MIN. 0.770 0.870 0.970 1.070 1.170 1.270 1.370 1.470 1.568 1.666 1.764 1.862 1.960 2.058 2.156 2.254 2.352 2.450 2.548 2.646 2.744 2.842 2.940 3.038 3.136 3.234 3.332 3.430 3.528 3.626 3.724 3.822 3.920 4.018 4.116 4.214 4.321 4.410 4.508 4.606 4.704 4.802 4.900
MAX. 0.830 0.930 1.030 1.130 1.230 1.330 1.430 1.530 1.632 1.734 1.836 1.938 2.040 2.142 2.244 2.346 2.448 2.550 2.652 2.754 2.856 2.958 3.060 3.162 3.264 3.366 3.468 3.570 3.672 3.774 3.876 3.978 4.080 4.182 4.284 4.386 4.488 4.590 4.692 4.794 4.896 4.998 5.100
MIN. 0.01
MAX. 0.70
MIN. -0.40
MAX. -0.01
0.10
0.70
1.30
-0.60
-0.30
-0.08
0.30
1.00
1.80
-0.80
-0.40
-0.14
0.60
1.60
2.60
-1.00
-0.50
-0.20
1.00
2.00
3.10
-1.20
-0.60
-0.40
1.30
2.30
3.30
-1.30
-0.65
-0.60
NOTE: *1: When VDF(T)1.4V, the detection accuracy is 30mV. When VDF(T)1.5V, the detection accuracy is 2%. *2: This numerical value is applied only to the XC6109C series (CMOS output).
6/13
XC6109
Series
TEST CIRCUITS
Circuit 1
R=100k No resistor needed for CMOS output products
Circuit 2
VIN VOUT
A
VIN VOUT
V
Cd VSS
V
Cd VSS
Circuit 3
Circuit 4
VIN VOUT A Cd VSS A Cd
VIN VOUT
VSS
Circuit 5
R=100k No resistor needed for CMOS output products
Circuit 6
VIN VOUT
VIN VOUT
Cd V VSS
V
Cd VSS
V
Circuit 7
R=100k No resistor needed for CMOS output products
VIN VOUT
Waveform Measurement Point
Cd VSS
7/13
XC6109 Series
OPERATIONAL EXPLANATION
A typical circuit example is shown in Figure 1, and the timing chart of Figure 1 is shown in Figure 2 on the next page. As an early state, the input voltage pin is applied sufficiently high voltage to the release voltage and the delay capacitance (Cd) is charged to the input pin voltage. While the input pin voltage (VIN) starts dropping to reach the detect voltage (VDF) (VIN > VDF), the output voltage (VOUT) keeps the "High" level (=VIN). When the input pin voltage keeps dropping and becomes equal to the detect voltage (VIN = VDF), an N-ch transistor for the delay capacitance discharge is turned ON, and starts to discharge the delay capacitance. For the internal circuit, which uses the delay capacitance pin as power input, the reference voltage operates as a comparator of VIN, and the output voltage changes into the "Low" level (VINx0.1). The detect delay time (TDF) is defined as time which ranges from VIN =VDF to the VOUT of "Low" level (especially, when the Cd pin is not connected: TDF0). While the input pin voltage keeps below the detect voltage, and 0.7V or more, the delay capacitance is discharged to the ground voltage (=VSS) level. Then, the output voltage (VOUT) maintains the "Low" level. While the input pin voltage drops to 0.7V or less and it increases again to 0.7V or more, the output voltage may not be able to maintain the "Low" level. Such an operation is called "Unspecified Operation", and voltage which occurs at the output pin voltage is defined as unstable operating voltage (VUNS). While the input pin voltage increases more than 0.7V and it reaches to the release voltage level (VINVDF +VHYS), the output voltage (VOUT) maintains the "Low" level. When the input pin voltage continues to increase more than 0.7V up to the release voltage level (= VDF + VHYS), the N-ch transistor for the delay capacitance discharge will be turned OFF, and the delay capacitance will be started discharging via a delay resistor (Rdelay). The internal circuit, which uses the delay capacitance pin as power input, will operate as a hysteresis comparator (Rise Logic Threshold: VTLH=VTCD, Fall Logic Threshold: VTHL=VSS) while the input pin voltage keeps higher than the detect voltage (VIN > VDF). While the input pin voltage becomes equal to the release voltage or higher and keeps the detect voltage or higher, the delay capacitance (Cd) will be charged up to the input pin voltage. When the delay capacitance pin voltage (VCD) reaches to the delay capacitance pin threshold voltage (VTCD), the output voltage changes into the "High" (=VIN) level. TDR is defined as time which ranges from VIN =VDF+VHYS to the VOUT of "High" level (especially when the Cd pin is not connected: TDR0). TDR can be given by the formula (1). TDR = RdelayxCdxIn (1VTCD / VIN) +TDR0 ...(1) * In = a natural logarithm The release delay time can also be briefly calculated with the formula (2) because the delay resistance is 2.0M(TYP.) and the delay capacitance pin threshold voltage is VIN /2 (TYP.) TDR = 2.0e6xCdx0.69...(2) As an example, presuming that the delay capacitance is 0.68F, TDR is : 2.0e6x0.68e6x0.69 = 938 (ms) * Note that the release delay time may remarkably be short when the delay capacitance is not discharged to the ground (=VSS) level because time described in is short. While the input pin voltage is higher than the detect voltage (VIN > VDF), therefore, the output voltage maintains the "High"(=VIN) level.
Release Delay Time Chart
Delay Capacitance [Cd] (F) 0.01 0.022 0.047 0.1 0.22 0.47 1 Release Delay Time [TDR] (TYP.) (ms) 13.8 30.4 64.9 138 304 649 1380 Release Delay Time [TDR] (MIN. ~ MAX.) (ms) 11.0 ~ 16.6 24.3 ~ 36.4 51.9 ~ 77.8 110 ~ 166 243~ 364 519 ~ 778 1100 ~ 1660
8/13
XC6109
Series
OPERATIONAL EXPLANATION (Continued)
Figure 1: Typical application circuit example
Figure 2: The timing chart of Figure 1
Input Voltage: VIN Release Voltage: VDF+VHYS Detect Voltage: VDF
Minimum Operating Voltage (0.7V) Delay Capacitance Pin Voltage: VCD
Delay Capacitance Pin Threshold Voltage: VTCD
Output Pin Voltage: VOUT

9/13
XC6109 Series
NOTES ON USE
1. Use this IC within the stated maximum ratings. Operation beyond these limits may cause degrading or permanent damage to the device. 2. The input pin voltage drops by the resistance between power supply and the VIN pin, and by through current at operation of the IC. At this time, the operation may be wrong if the input pin voltage falls below the minimum operating Oscillation of the voltage range. In CMOS output, for output current, drops in the input pin voltage similarly occur. voltage. Note it especially when you use the IC with the VIN pin connected to a resistor. 3. Note that a rapid and high fluctuation of the input pin voltage may cause a wrong operation. 4. When there is a possibility of which the input pin voltage falls rapidly (e.g.: 6.0V to 0V) at release operation with the delay capacitance pin (Cd) connected to a capacitor, use a schottky barrier diode connected between the VIN pin and the Cd pin as the Figure 3 shown below.
circuit may occur if the drops in voltage, which caused by through current at operation of the IC, exceed the hysteresis
Figure 3: Circuit example with the delay capacitance pin (Cd) connected to a schottky barrier diode
VIN SBD VIN Cd
R=100k (No resistor needed for CMOS output products) VOUT VOUT
Cd VSS
10/13
XC6109
Series
TYPICAL PERFORMANCE CHARACTERISTICS
(1) Supply Current vs. Input Voltage
XC6109x25A N
(2) Detect Voltage vs. Ambient Temperature
XC6109x25A N
2.0 Supply Current: ISS (A) Ta=85 1.5 25
Detect Voltage: VDF (V)
2.55
1.0 -40 0.5
2.50
0.0 0 1 2 3 4 5 6 Input V oltage: V IN (V )
2.45 -50 -25 0 25 50 75 100 A mbient Temperature: Ta ( )
(3) Hysteresis Voltage vs. Ambient Temperature
XC6109x25A N
0.20
Hysteresis Voltage : VHYS (V)
0.15
0.10
0.05 -50 -25 0 25 50 75 100 A mbient Temperature: Ta ( )
(4) Output Voltage vs. Input Voltage
XC6109C25A N 4.0 Output Voltage: VOUT (V) 3.0 2.0 1.0 0.0 -1.0 0 0.5 1 1.5 2 Input V oltage: V IN (V ) 2.5 3 Ta=85 25 -40
No Pull-up
XC6109N25A N
Pull-up=VIN, R=100k
4.0 Output Voltage: VOUT (V) 3.0 2.0 1.0 -40 0.0 -1.0 0 0.5 1 1.5 Ta=85 25
2
2.5
3
Input V oltage: V IN (V )
11/13
XC6109 Series
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(5) Output Current vs. Input Voltage
XC6109x50A N 4.0 Output Current: IOUT (mA)
VDS(N-ch)=0.5V
XC6109C08A N
VDS(P-ch)=0.5V
0.0 Output Current: IOUT (mA)
Ta=-40 3.0 25
-0.5
Ta=85
2.0 85
-1.0 25 -40
1.0
-1.5
0.0 0 1 2 3 4 5 6 Input Voltage: V IN (V )
-2.0 0 1 2 3 4 Input V oltage: V IN (V ) 5 6
(6) Cd Pin Sink Current vs. Input Voltage
XC6109x50A N 3.0 Cd Pin Sink Current: ICD (mA) 2.5 2.0 1.5 1.0 0.5 0.0 0 1 2 3 4 Input V oltage: V IN (V ) 5 6 85 25
VDS=0.5V
(7) Delay Resistance vs. Ambient Temperature
XC6109xxxA N
VCD=0.0V, VIN=6.0V
Ta=-40
Delay Resistance: Rdelay (M )
4 3.5 3 2.5 2 1.5 1 -50
-25 0 25 50 75 A mbient Temperature: Ta ( )
100
(8) Release Delay Time vs. Delay Capacitance
XC6109xxxA N
VIN(MIN.)=0.7V,VIN(MAX.)=6.0V Tr=5s, Ta=25
(9) Detect Delay Time vs. Delay Capacitance
XC6109xxxA N
VIN(MIN.)=0.7V, VIN(MAX.)=6.0V Tf=5s, Ta=25
Release Delay Time: TDR (ms)
Detect Delay Time: TDF (s)
10000 1000 100 10 1 0.1 0.0001
100000 10000 1000 100 10 1 0.0001
0.001 0.01 0.1 Delay Capacitance: Cd (F)
1
0.001
0.01
0.1
1
Delay Capacitance: Cd (F)
12/13
XC6109
Series
1. The products and product specifications contained herein are subject to change without notice to improve performance characteristics. Consult us, or our representatives before use, to confirm that the information in this catalog is up to date. 2. We assume no responsibility for any infringement of patents, patent rights, or other rights arising from the use of any information and circuitry in this catalog. 3. Please ensure suitable shipping controls (including fail-safe designs and aging protection) are in force for equipment employing products listed in this catalog. 4. The products in this catalog are not developed, designed, or approved for use with such equipment whose failure of malfunction can be reasonably expected to directly endanger the life of, or cause significant injury to, the user. (e.g. Atomic energy; aerospace; transport; combustion and associated safety equipment thereof.) 5. Please use the products listed in this catalog within the specified ranges. Should you wish to use the products under conditions exceeding the specifications, please consult us or our representatives. 6. We assume no responsibility for damage or loss due to abnormal use. 7. All rights reserved. No part of this catalog may be copied or reproduced without the prior permission of Torex Semiconductor Ltd.
13/13

▲Up To Search▲

Price & Availability of XC6109N5XXNX

	To Download XC6109N5XXNX Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .